pcie_cfg_msg (CPM4_PCIE0_ATTR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

pcie_cfg_msg (CPM4_PCIE0_ATTR) Register Description

Register Namepcie_cfg_msg
Offset Address0x0000000E98
Absolute Address 0x00FCA50E98 (CPM4_PCIE0_ATTR)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
Descriptionpcie_cfg_msg

pcie_cfg_msg (CPM4_PCIE0_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
data_type13:9roRead-only0x0
data 8:1roRead-only0x0
received 0wtcReadable, write a 1 to clear0x0