mdma_Cfg_0_L (CPM4_DMA_ATTR) Register - mdma_Cfg_0_L (CPM4_DMA_ATTR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document_ID
AM012
Release_Date
2026-08-24
Revision
1.6

mdma_Cfg_0_L (CPM4_DMA_ATTR) Register Description

Register Namemdma_Cfg_0_L
Offset Address0x00000000E0
Absolute Address 0x00FCA700E0 (CPM4_DMA_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionMdma configuration attributes

This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_mdma_cfg_0_l

mdma_Cfg_0_L (CPM4_DMA_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr31:0rwNormal read/write0x0Lower bits of MDMA configuration register 0. Function is implementation-specific (may include address or control parameters).