mcap1_intcpm_axi_rd_I_main_QosGenerator_Bandwidth (CPM5_INT_GPV) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

mcap1_intcpm_axi_rd_I_main_QosGenerator_Bandwidth (CPM5_INT_GPV) Register Description

Register Namemcap1_intcpm_axi_rd_I_main_QosGenerator_Bandwidth
Offset Address0x0000000310
Absolute Address 0x00FCD80310 (CPM5_INT_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000400
DescriptionRegister Bandwidth

Alternate register name: if_mcap1_intcpm_axi_rd_I_main_QosGenerator_Bandwidth

mcap1_intcpm_axi_rd_I_main_QosGenerator_Bandwidth (CPM5_INT_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Bandwidth10:0rwNormal read/write0x400Defines the bandwidth threshold in 1/256th-byte-per-cycle units. In other words, the desired rate in MBps is divided by frequency in MHz of the NIU, and then multiplied by 256.