if_intcpm_l2cacheconfg_0_power_main_ResilienceFaultController_IntEn (CPM4_INT_GPV) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

if_intcpm_l2cacheconfg_0_power_main_ResilienceFaultController_IntEn (CPM4_INT_GPV) Register Description

Register Nameif_intcpm_l2cacheconfg_0_power_main_ResilienceFaultController_IntEn
Offset Address0x00000012AC
Absolute Address 0x00FCB012AC (CPM4_INT_GPV)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionInterruptEnable register

if_intcpm_l2cacheconfg_0_power_main_ResilienceFaultController_IntEn (CPM4_INT_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
MissionFaultEn 1rwNormal read/write0x0MissionFault Interrupt enable
BistDoneEn 0rwNormal read/write0x0BistDone Interrupt enable