attr_dma_pciebar2axibar_pf0_bar3_sec_cache_len (CPM5_DMA_ATTR) Register Description
| Register Name | attr_dma_pciebar2axibar_pf0_bar3_sec_cache_len |
|---|---|
| Offset Address | 0x00000003CC |
| Absolute Address |
0x00FCE103CC (CPM5_DMA0_ATTR) 0x00FCE903CC (CPM5_DMA1_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Attr Dma Pciebar2Axibar Pf0 Bar3 Sec Cache Len register |
This register should only be written to during reset of the PCIe block
attr_dma_pciebar2axibar_pf0_bar3_sec_cache_len (CPM5_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| len | 6:0 | rwNormal read/write | 0x0 | Bar size in bits for PF[*] BAR |