attr_dma_axibar2pciebar_sec_1 (CPM5_DMA_ATTR) Register Description
| Register Name | attr_dma_axibar2pciebar_sec_1 |
|---|---|
| Offset Address | 0x000000026C |
| Absolute Address |
0x00FCE1026C (CPM5_DMA0_ATTR) 0x00FCE9026C (CPM5_DMA1_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | AXI to PCIe bar security |
This register should only be written to during reset of the PCIe block
attr_dma_axibar2pciebar_sec_1 (CPM5_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 0 | rwNormal read/write | 0x0 |