agent_iccc0_llc_ecc_disable (CPM5_L2_CFG) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

agent_iccc0_llc_ecc_disable (CPM5_L2_CFG) Register Description

Register Nameagent_iccc0_llc_ecc_disable
Offset Address0x0000006100
Absolute Address 0x00FCC06100 (CPM5_L20_CSR)
0x00FCC86100 (CPM5_L21_CSR)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionThis register allows ECC to be disabled for either the Data arrays or the Tag arrays.

This register allows ECC to be disabled for either the Data arrays or the Tag arrays. These are independently controlled. A bit value of 1 indicates that ECC is disabled. A bit value of 0 indicates ECC is enabled, if present. The register value resets to value 0, meaning ECC is enabled.

agent_iccc0_llc_ecc_disable (CPM5_L2_CFG) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
UNSD_63_3263:2roRead-only0x0
D 1rwNormal read/write0x0Disable Data ECC Check/Correct
T 0rwNormal read/write0x0Disable Tag ECC Check/Correct