agent_iccc0_llc_ecc_data_info (CPM4_L2_CSR) Register Description
Register Name | agent_iccc0_llc_ecc_data_info |
Offset Address | 0x0000006118 |
Absolute Address |
0x00FCD06118 (CPM4_L2_CSR)
|
Width | 64 |
Type | mixedMixed types. See bit-field details. |
Reset Value | 0x00000000 |
Description | This is a status register that tracks ECC errors that occur in the Data array. |
This is a status register that tracks ECC errors that occur in the Data array. The register will track the number of ECC errors, as well as whether single-bit or double-bit errors have been detected. If the SB bit is set, at least one single bit error has been detected. If the DB bit is set, at least one double-bit error has been detected. Additionally, the register tracks information about the first error detected. It stores the index of the tag array that had the error, as well as the way group. It also tracks which half of the cache line failed, which is needed to identify the sub-bank that failed. If a double-bit error occurs after a single-bit error has already been recorded, the double-bit error will overwrite the content of the register. This is because double-bit errors are fatal, and the information about how a fatal error is more important that the information about a non-fatal error. The register can be read for status, but can also be written. If the SB and DB bit are written with zeros, the sampling of the first detected error will happen as described above.
agent_iccc0_llc_ecc_data_info (CPM4_L2_CSR) Register Bit-Field Summary
Field Name | Bits | Type | Reset Value | Description |
Unused | 63:43 | roRead-only | 0x0 | unused |
Index | 42:32 | rwNormal read/write | 0x0 | index of first detected error |
ECC_Count | 31:16 | rwNormal read/write | 0x0 | number of ECC errors found |
UNSD_15_8 | 15:10 | roRead-only | 0x0 | |
hlf | 9 | rwNormal read/write | 0x0 | Which half of cache line reported error |
way | 8:2 | rwNormal read/write | 0x0 | Way group of first detected error |
db | 1 | rwNormal read/write | 0x0 | Detected double or multi bit error |
sb | 0 | rwNormal read/write | 0x0 | Detected single bit error |