agent_iccc0_llc_alloc_arcache_en (CPM5_L2_CFG) Register Description
| Register Name | agent_iccc0_llc_alloc_arcache_en |
|---|---|
| Offset Address | 0x0000006050 |
| Absolute Address |
0x00FCC06050 (CPM5_L20_CSR) 0x00FCC86050 (CPM5_L21_CSR) |
| Width | 64 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | This register holds one bit for each of the LLC Allocation Classes. |
This register holds one bit for each of the LLC Allocation Classes. If the bit is marked as one, this indicates that read allocation for that LLC Allocation Class is controlled by the ARCACHE bits. If marked as zero, it means the allocation will be controlled by the llc_alloc_rd_en register. The default of this register is configured within NocStudio.
agent_iccc0_llc_alloc_arcache_en (CPM5_L2_CFG) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| UNSD_63_8 | 63:8 | roRead-only | 0x0 | |
| ARCACHE_Allocation_Enable | 7:0 | rwNormal read/write | 0x0 | Read allocation for that LLC Allocation Class is controlled by the ARCACHE bits/llc_alloc_rd_en register. |