TIMEOUT_IR_STATUS (CPM5_INT_CSR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)
Document ID
AM012
Release Date
2024-08-19
Revision
1.4

TIMEOUT_IR_STATUS (CPM5_INT_CSR) Register Description

Register NameTIMEOUT_IR_STATUS
Offset Address0x0000000090
Absolute Address 0x00FCA00090 (CPM5_INT_CSR)
Width32
TypewtcReadable, write a 1 to clear
Reset Value0x00000000
DescriptionInterrupt Status Register. This is a sticky register that holds the value of the interrupt until cleared by a value of 1.

TIMEOUT_IR_STATUS (CPM5_INT_CSR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:23wtcReadable, write a 1 to clear0x0reserved
cpm_rd_resp_probe_maintracealarm22wtcReadable, write a 1 to clear0x0Coresight Debug Trace Alarm
cpm_rd_req_probe_maintracealarm21wtcReadable, write a 1 to clear0x0Coresight Debug Trace Alarm
cpm_wr_resp_probe_maintracealarm20wtcReadable, write a 1 to clear0x0Coresight Debug Trace Alarm
cpm_wr_req_probe_maintracealarm19wtcReadable, write a 1 to clear0x0Coresight Debug Trace Alarm
intcpm_crx_apb_maintimeout18wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_cmnconfig_axi_raw_rst_n needs to be enabled to clear this bit.
intcpm_sysmon_apb_maintimeout17wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_cmnconfig_axi_raw_rst_n needs to be enabled to clear this bit.
intcpm_gty3_cfg_apb_maintimeout16wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_cmnconfig_axi_raw_rst_n needs to be enabled to clear this bit.
intcpm_gty2_cfg_apb_maintimeout15wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_addrremap_lsbus_raw_rst_n needs to be enabled to clear this bit.
intcpm_gty1_cfg_apb_maintimeout14wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_cmnconfig_axi_raw_rst_n needs to be enabled to clear this bit.
intcpm_gty0_cfg_apb_maintimeout13wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_addrremap_lsbus_raw_rst_n needs to be enabled to clear this bit.
intcpm_cmnconfg_axi_maintimeout12wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_cmnconfig_axi_raw_rst_n needs to be enabled to clear this bit.
intcpm_addrremap_apb_maintimeout11wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_addrremap_lsbus_raw_rst_n needs to be enabled to clear this bit.
intcpm_pcie1_axi_maintimeout10wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_pcie1_axi_raw_rst_n needs to be enabled to clear this bit.
intcpm_pcie0_axi_maintimeout 9wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_pcie0_axi_raw_rst_n needs to be enabled to clear this bit.
intcpm_l2c1_axi_maintimeout 8wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_l2cacheconfig_1_raw_rst_n needs to be enabled to clear this bit.
intcpm_l2c0_axi_maintimeout 7wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The intcpm_l2cacheconfig_0_raw_rst_n needs to be enabled to clear this bit.
cpm_pl_axi1_maintimeout 6wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The cpm_pl_axi1_raw_rst_n needs to be enabled to clear this bit.
cpm_pl_axi0_maintimeout 5wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The cpm_pl_axi0_raw_rst_n needs to be enabled to clear this bit.
cpm_ps_axi1_maintimeout 4wtcReadable, write a 1 to clear0x01b1 indicates a timeout at the slave. The cpm_ps_axi1_raw_rst_n needs to be enabled to clear this bit.