SGDMA_DESCRIPTOR_CREDIT_CONTROL_WTC (CPM4_XDMA_CSR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

SGDMA_DESCRIPTOR_CREDIT_CONTROL_WTC (CPM4_XDMA_CSR) Register Description

Register NameSGDMA_DESCRIPTOR_CREDIT_CONTROL_WTC
Offset Address0x0000006028
Absolute Address 0x00E1006028 (CPM4_XDMA_CSR)
Width32
TypemixedMixed types. See bit-field details.
Reset Value0x00000000
DescriptionSGDMA_DESCRIPTOR_CREDIT_CONTROL_WTC

SGDMA_DESCRIPTOR_CREDIT_CONTROL_WTC (CPM4_XDMA_CSR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved31:20roRead-only0x0reserved
c2h_dsc_crd_en19:16wtcReadable, write a 1 to clear0x0
Reserved15:4roRead-only0x0reserved
h2c_dsc_crd_en 3:0wtcReadable, write a 1 to clear0x0