PL_EQ_RX_ADAPT_SIM_ENABLE (CPM4_PCIE1_ATTR) Register Description
| Register Name | PL_EQ_RX_ADAPT_SIM_ENABLE |
|---|---|
| Offset Address | 0x00000002D8 |
| Absolute Address | 0x00FCA602D8 (CPM4_PCIE1_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Enables using PL_EQ_RX_ADAPT_TIMER_SIM when TRUE, else PL_EQ_RX_ADAPT_TIMER is used. |
This register should only be written to during reset of the PCIe block
PL_EQ_RX_ADAPT_SIM_ENABLE (CPM4_PCIE1_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 0 | rwNormal read/write | 0x0 |