PFx_SRIOV_FUNC_DEP_LINK_1 (CPM4_PCIE0_ATTR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

PFx_SRIOV_FUNC_DEP_LINK_1 (CPM4_PCIE0_ATTR) Register Description

Register NamePFx_SRIOV_FUNC_DEP_LINK_1
Offset Address0x0000000828
Absolute Address 0x00FCA50828 (CPM4_PCIE0_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPhysical Function Dependency Link: This field is used to specify dependencies between PFs. The programming model for a Device may have vendor specific dependencies between sets of Functions. The Function Dependency Link field is used to describe these dependencies. Upper 8 bits are reserved/unused.

This register should only be written to during reset of the PCIe block

PFx_SRIOV_FUNC_DEP_LINK_1 (CPM4_PCIE0_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr15:0rwNormal read/write0x0