PFx_SRIOV_CAP_TOTAL_VF_0 (CPM5_PCIE_ATTR) Register Description
| Register Name | PFx_SRIOV_CAP_TOTAL_VF_0 |
|---|---|
| Offset Address | 0x0000001608 |
| Absolute Address |
0x00FCE09608 (CPM5_PCIE0_ATTR) 0x00FCE89608 (CPM5_PCIE1_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Total Number of VFs: Total number of VFs configured for PF0. Must be equal to PF0_SRIOV_CAP_INITIAL_VF. Count must be power of 2 for PF0_SRIOV_VF_STRIDE > 1. |
This register should only be written to during reset of the PCIe block
PFx_SRIOV_CAP_TOTAL_VF_0 (CPM5_PCIE_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 15:0 | rwNormal read/write | 0x0 |