PFx_SRIOV_ARI_CAPBL_HIER_PRESERVED_7 (CPM5_PCIE_ATTR) Register Description
| Register Name | PFx_SRIOV_ARI_CAPBL_HIER_PRESERVED_7 |
|---|---|
| Offset Address | 0x00000015A4 |
| Absolute Address |
0x00FCE095A4 (CPM5_PCIE0_ATTR) 0x00FCE895A4 (CPM5_PCIE1_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | ARI Capable Hierarchy Preserved: If set to TRUE, the ARI Capable Hierarchy bit is preserved across certain power state transitions. |
This register should only be written to during reset of the PCIe block
PFx_SRIOV_ARI_CAPBL_HIER_PRESERVED_7 (CPM5_PCIE_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 0 | rwNormal read/write | 0x0 |