PFx_PM_CAP_NEXTPTR_12 (CPM5_PCIE_ATTR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

PFx_PM_CAP_NEXTPTR_12 (CPM5_PCIE_ATTR) Register Description

Register NamePFx_PM_CAP_NEXTPTR_12
Offset Address0x00000012F4
Absolute Address 0x00FCE092F4 (CPM5_PCIE0_ATTR)
0x00FCE892F4 (CPM5_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionPM Capability Next Cap Pointer: Contains pointer to the next PCI Capability Structure.

This register should only be written to during reset of the PCIe block

PFx_PM_CAP_NEXTPTR_12 (CPM5_PCIE_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 7:0rwNormal read/write0x0