PF0_DEV_CAP2_64B_ATOMIC_COMPLETER_SUPPORT (CPM5_PCIE_ATTR) Register Description
| Register Name | PF0_DEV_CAP2_64B_ATOMIC_COMPLETER_SUPPORT |
|---|---|
| Offset Address | 0x0000000E48 |
| Absolute Address |
0x00FCE08E48 (CPM5_PCIE0_ATTR) 0x00FCE88E48 (CPM5_PCIE1_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | 64-bit AtomicOp Completer Supported: If TRUE sets Bit 8, includes FetchAdd, Swap, and CAS AtomicOps optional capability. |
This register should only be written to during reset of the PCIe block
PF0_DEV_CAP2_64B_ATOMIC_COMPLETER_SUPPORT (CPM5_PCIE_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 0 | rwNormal read/write | 0x0 |