PF0_DEV_CAP2_128B_CAS_ATOMIC_COMPLETER_SUPPORT (CPM4_PCIE0_ATTR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

PF0_DEV_CAP2_128B_CAS_ATOMIC_COMPLETER_SUPPORT (CPM4_PCIE0_ATTR) Register Description

Register NamePF0_DEV_CAP2_128B_CAS_ATOMIC_COMPLETER_SUPPORT
Offset Address0x00000005D4
Absolute Address 0x00FCA505D4 (CPM4_PCIE0_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
Description128-bit CAS Completer Supported:
If TRUE sets Bit 9, enables optional capability.

This register should only be written to during reset of the PCIe block

PF0_DEV_CAP2_128B_CAS_ATOMIC_COMPLETER_SUPPORT (CPM4_PCIE0_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0