PCIeBar2AXIBar_2_Wr_Cache_PF0 (CPM4_DMA_ATTR) Register Description
| Register Name | PCIeBar2AXIBar_2_Wr_Cache_PF0 |
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| Offset Address | 0x0000000270 |
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| Absolute Address |
0x00FCA70270 (CPM4_DMA_ATTR)
|
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| Width | 32 |
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| Type | rwNormal read/write |
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| Reset Value | 0x00000000 |
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| Description | ARCACHE value for PF0 BAR2 writes |
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This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_pciebar2axibar_2_wr_cache_pf0
PCIeBar2AXIBar_2_Wr_Cache_PF0 (CPM4_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| attr | 3:0 | rwNormal read/write | 0x0 | |