LL_UFC_ARBITER_ENABLE (CPM4_PCIE1_ATTR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

LL_UFC_ARBITER_ENABLE (CPM4_PCIE1_ATTR) Register Description

Register NameLL_UFC_ARBITER_ENABLE
Offset Address0x0000000350
Absolute Address 0x00FCA60350 (CPM4_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionMultiVC UCF Arbiter Enable. When TRUE enabled, else disabled. Required to be TRUE when CCIX is enabled.

This register should only be written to during reset of the PCIe block

LL_UFC_ARBITER_ENABLE (CPM4_PCIE1_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0