LL_ACK_TIMEOUT_EN (CPM4_PCIE0_ATTR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

LL_ACK_TIMEOUT_EN (CPM4_PCIE0_ATTR) Register Description

Register NameLL_ACK_TIMEOUT_EN
Offset Address0x0000000324
Absolute Address 0x00FCA50324 (CPM4_PCIE0_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionEnables the Ack/Nak Latency Timer to use the user-defined LL_ACK_TIMEOUT value (or combined with the built-in value, depending on LL_ACK_TIMEOUT_FUNC). If FALSE, the built-in value is used.

This register should only be written to during reset of the PCIe block

LL_ACK_TIMEOUT_EN (CPM4_PCIE0_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0