IDR (CPM4_PCIE0_ATTR) Register Description
| Register Name | IDR |
|---|---|
| Offset Address | 0x000000001C |
| Absolute Address | 0x00FCA5001C (CPM4_PCIE0_ATTR) |
| Width | 32 |
| Type | woWrite-only |
| Reset Value | 0x00000000 |
| Description | Interrupt Disable Register. A write of one to this location will mask the interrupt. (IMR: 1) |
IDR (CPM4_PCIE0_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| dpll_lock_timeout_err | 1 | woWrite-only | 0x0 | DPLL lock not received within interval programmed in dpll_timeout register |
| addr_decode_err | 0 | woWrite-only | 0x0 | Address Decode Error |