H2C3_CHANNEL_ALIGNMENTS (CPM4_XDMA_CSR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

H2C3_CHANNEL_ALIGNMENTS (CPM4_XDMA_CSR) Register Description

Register NameH2C3_CHANNEL_ALIGNMENTS
Offset Address0x000000034C
Absolute Address 0x00E100034C (CPM4_XDMA_CSR)
Width32
TyperoRead-only
Reset Value0x00010120
DescriptionH2C3_CHANNEL_ALIGNMENTS

H2C3_CHANNEL_ALIGNMENTS (CPM4_XDMA_CSR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
addr_alignment23:16roRead-only0x1The byte alignment that the source and destination addresses must align to.
len_granularity15:8roRead-only0x1The minimum granularity of DMA transfers in bytes.
address_bits 7:0roRead-only0x20The number of address bits configured.