H2C1_CHANNEL_STATUS_WTC (CPM4_XDMA_CSR) Register Description
| Register Name | H2C1_CHANNEL_STATUS_WTC |
|---|---|
| Offset Address | 0x0000000140 |
| Absolute Address | 0x00E1000140 (CPM4_XDMA_CSR) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | H2C1_CHANNEL_STATUS_WTC |
H2C1_CHANNEL_STATUS_WTC (CPM4_XDMA_CSR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:25 | roRead-only | 0x0 | reserved |
| linkdown_err | 24 | wtcReadable, write a 1 to clear | 0x0 | Linkdown occured.Reset (0) on setting Control.Run. |
| descr_error | 23:19 | wtcReadable, write a 1 to clear | 0x0 | Reset (0) on setting Control.Run. Bit position: 4: Unexpected completion 3: Header EP 2: Parity error 1: Completer abort 0: Unsupported request |
| write_error | 18:14 | wtcReadable, write a 1 to clear | 0x0 | Reset (0) on setting Control.Run. Bit position: 4-2: Reserved 1: Slave error 0: Decode error |
| read_error | 13:9 | wtcReadable, write a 1 to clear | 0x0 | Reset (0) on setting Control.Run. Bit position: 4: Unexpected completion 3: Header EP 2: Parity error 1: Completer abort 0: Unsupported request |
| Reserved | 8:7 | wtcReadable, write a 1 to clear | 0x0 | reserved |
| idle_stopped | 6 | wtcReadable, write a 1 to clear | 0x0 | Reset (0) on setting Control.Run. Set when the engine is idle after resetting Control.Run if Control.IE_idle_stopped is set. |
| invalid_length | 5 | wtcReadable, write a 1 to clear | 0x0 | The descriptor length is not a multiple of the data width of an AXI4-Stream channel. |
| magic_stopped | 4 | wtcReadable, write a 1 to clear | 0x0 | Reset on setting Control.Run. Set when the engine encounters a descriptor with invalid magic and stopped if Control.IE_Magic_stopped is set. |
| align_mismatch | 3 | wtcReadable, write a 1 to clear | 0x0 | Source and destination address on descriptor are not properly aligned to each other. |
| descriptor_completed | 2 | wtcReadable, write a 1 to clear | 0x0 | Reset on setting Control.Run. Set after the engine has completed a descriptor with the COMPLETE bit set if Control.IE_Descriptor_completed is set. |
| descriptor_stopped | 1 | wtcReadable, write a 1 to clear | 0x0 | Reset on setting Control.Run. Set after the engine completed a descriptor with the STOP bit set if Control.IE_Descriptor_stopped is set. |
| Busy | 0 | roRead-only | 0x0 | Set if the SGDMA engine is busy. Zero when it is idle. |