GT_EQ_POST_CUR7 (CPM5_PCIE_ATTR) Register Description
| Register Name | GT_EQ_POST_CUR7 |
|---|---|
| Offset Address | 0x0000000480 |
| Absolute Address |
0x00FCE08480 (CPM5_PCIE0_ATTR) 0x00FCE88480 (CPM5_PCIE1_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Map to post cursor 7 |
This register should only be written to during reset of the PCIe block
GT_EQ_POST_CUR7 (CPM5_PCIE_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 4:0 | rwNormal read/write | 0x0 |