GICR_CIDR0 (APU_GIC_REDIST_CTLLPI) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

GICR_CIDR0 (APU_GIC_REDIST_CTLLPI) Register Description

Register NameGICR_CIDR0
Offset Address0x000000FFF0
Absolute Address 0x00F908FFF0 (APU_GIC_REDIST_CTLLPI_0)
0x00F90AFFF0 (APU_GIC_REDIST_CTLLPI_1)
Width32
TyperoRead-only
Reset Value0x0000000D
DescriptionComponent ID0 Register

GICR_CIDR0 (APU_GIC_REDIST_CTLLPI) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0roRead-only0xD