GICH_APR (APU_GIC_A72_VIFCTL) Register Description
| Register Name | GICH_APR |
|---|---|
| Offset Address | 0x00000000F0 |
| Absolute Address | 0x00F90500F0 (APU_GIC_VIFCTL) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | GICH_APR |
GICH_APR (APU_GIC_A72_VIFCTL) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Active | 3:0 | rwNormal read/write | 0 |