GICD_SETSPI_SR (APU_GIC_DIST_MBSPI) Register Description
| Register Name | GICD_SETSPI_SR |
|---|---|
| Offset Address | 0x0000000050 |
| Absolute Address | 0x00F9010050 (APU_GIC_DIST_MBSPI) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | Secure SPI Set Register |
GICD_SETSPI_SR (APU_GIC_DIST_MBSPI) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| GICD_SETSPI_SR_9_0 | 9:0 | rwNormal read/write | 0 | GICD_SETSPI_SR_9_0 |