GICD_ISENABLER5 (APU_GIC_DIST_MAIN) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

GICD_ISENABLER5 (APU_GIC_DIST_MAIN) Register Description

Register NameGICD_ISENABLER5
Offset Address0x0000000114
Absolute Address 0x00F9000114 (APU_GIC_DIST_MAIN)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionInterrupt Set-Enable Registers

GICD_ISENABLER5 (APU_GIC_DIST_MAIN) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
_31:0rwNormal read/write0x0