Ch3_MultQ (CPM4_DMA_ATTR) Register Description
| Register Name | Ch3_MultQ |
|---|---|
| Offset Address | 0x0000000940 |
| Absolute Address | 0x00FCA70940 (CPM4_DMA_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | The channel has multiq enabled. 1 - MULTQ, 0 - XDMA |
This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_ch3_multq
Ch3_MultQ (CPM4_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 0 | rwNormal read/write | 0x0 |