Ch1_Rd_Sec (CPM4_DMA_ATTR) Register Description
| Register Name | Ch1_Rd_Sec |
|---|---|
| Offset Address | 0x00000008CC |
| Absolute Address | 0x00FCA708CC (CPM4_DMA_ATTR) |
| Width | 32 |
| Type | rwNormal read/write |
| Reset Value | 0x00000000 |
| Description | ARPROT value used for DMA AXIMM reads from channel1 |
This register should only be written to during reset of the PCIe block Alternate register name: attr_dma_ch1_rd_sec
Ch1_Rd_Sec (CPM4_DMA_ATTR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| attr | 0 | rwNormal read/write | 0x0 |