CONFIG_BLOCK_PCIE_DATA_WIDTH (CPM4_XDMA_CSR) Register Description
| Register Name | CONFIG_BLOCK_PCIE_DATA_WIDTH |
|---|---|
| Offset Address | 0x0000003018 |
| Absolute Address | 0x00E1003018 (CPM4_XDMA_CSR) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000002 |
| Description | CONFIG_BLOCK_PCIE_DATA_WIDTH |
CONFIG_BLOCK_PCIE_DATA_WIDTH (CPM4_XDMA_CSR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:3 | roRead-only | 0x0 | reserved |
| pcie_width | 2:0 | roRead-only | 0x2 | PCIe AXI4-Stream Width 0: 64 bits 1: 128 bits 2: 256 bits 3: 512 bits |