C2H3_CHANNEL_PERFORMANCE_DATA_COUNT0 (CPM4_XDMA_CSR) Register Description
| Register Name | C2H3_CHANNEL_PERFORMANCE_DATA_COUNT0 |
|---|---|
| Offset Address | 0x00000013CC |
| Absolute Address | 0x00E10013CC (CPM4_XDMA_CSR) |
| Width | 32 |
| Type | roRead-only |
| Reset Value | 0x00000000 |
| Description | C2H3_CHANNEL_PERFORMANCE_DATA_COUNT0 |
C2H3_CHANNEL_PERFORMANCE_DATA_COUNT0 (CPM4_XDMA_CSR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| pmon_dat_count | 31:0 | roRead-only | 0x0 | pmon_dat_count[31:0]. Increments for each valid read data beat while running. See PerformanceControl.Clear and PerformanceControl.Auto for clearing. |