C2H0_POLLMODE_WRITEBACK_ADDRESS_HIGH (CPM4_XDMA_CSR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

C2H0_POLLMODE_WRITEBACK_ADDRESS_HIGH (CPM4_XDMA_CSR) Register Description

Register NameC2H0_POLLMODE_WRITEBACK_ADDRESS_HIGH
Offset Address0x000000108C
Absolute Address 0x00E100108C (CPM4_XDMA_CSR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionC2H0_POLLMODE_WRITEBACK_ADDRESS_HIGH

C2H0_POLLMODE_WRITEBACK_ADDRESS_HIGH (CPM4_XDMA_CSR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
pollmode_hi_wb_addr31:0rwNormal read/write0x0Upper 32 bits of the poll mode writeback address.[63:32]