AXISTEN_IF_ENABLE_10B_TAGS (CPM4_PCIE1_ATTR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

AXISTEN_IF_ENABLE_10B_TAGS (CPM4_PCIE1_ATTR) Register Description

Register NameAXISTEN_IF_ENABLE_10B_TAGS
Offset Address0x00000000C4
Absolute Address 0x00FCA600C4 (CPM4_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionEnable Tag Scaling: When TRUE, enables 10b Tags width. When FALSE, Tag width is 8b/5b.

This register should only be written to during reset of the PCIe block

AXISTEN_IF_ENABLE_10B_TAGS (CPM4_PCIE1_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr 0rwNormal read/write0x0