APB_IMR (CPM4_CRX) Register Description
| Register Name | APB_IMR |
|---|
| Offset Address | 0x0000000008 |
|---|
| Absolute Address |
0x00FCA00008 (CPM4_CRX)
|
|---|
| Width | 32 |
|---|
| Type | roRead-only |
|---|
| Reset Value | 0x00000001 |
|---|
| Description | Interrupt Mask |
|---|
Read-only: 0: interrupt not masked (enabled) 1: interrupt masked (disabled) Clear a mask bit by writing to the IER register. Set a mask bit by writing to the IDR register. Alternate register name: IR_MASK
APB_IMR (CPM4_CRX) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|
| Reserved | 31:1 | roRead-only | 0x0 | Reserved |
| addr_decode_err | 0 | roRead-only | 0x1 | Mask for an address decode error interrupt. |