- AXI programming interface
- AXI DMA interface for descriptor read and data read/write accesses
AXI Programming Interface
The USB register module is accessed by software using the 32-bit AXI programming interface attached to the LPD IOP APB switch.
AXI DMA Master
The DMA AXI transaction includes several attributes for coherency and QoS. These are controlled by the following registers:
- USB_Route for coherency
- USB_QoS for quality of service (QoS)
- USB_SMID for system management ID (SMID)
When the DMA transaction is routed to the FPD memory coherent interconnect, it first passes through a TBU of the SMMU. This translation unit is also used by the SMMU TCU for translation table lookups.
Note: This datapath imposes a
bandwidth load to the FPD coherent interconnect. In very high traffic loads through
the TBU, a deadlock situation can occur. To ensure this does not happen, do not
route DMA transactions through the FPD coherent interconnect.