Reset Circuitry, EAM, and JTAG TAP Controller - AM011

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2025-03-11
Revision
1.7 English

The system-level resets are generated by the reset hardware circuitry, PMC system error accumulator module (EAM), the JTAG TAP controller, and registers in the PMC reset controller. These are illustrated in the following figure.

Figure 1. PMC Reset Circuitry, EAM and JTAG TAP Controller Reset Sources