The following table lists the programming interface type used for each block.
Note:
Not all blocks and subsystems
are present in all devices. See the
Versal
Architecture and Product Data Sheet: Overview (DS950) for a guide as to the blocks and subsystems available.
| Block or Subsystem | Primary Programming Interface | PL-based Programming Interface Option | Notes |
|---|---|---|---|
| PMC, PMC_IOP | APB | - | - |
| PS (RPU, APU, LPD IOP) | APB | - | - |
| CPM-PCIe |
Mostly APB |
APB | - |
| PL interconnect programming | CFU | - | Software programs the CFU to control the configuration frames interface (CFI) |
| PL CLE | CFU | - | - |
| PL Block RAM, UltraRAM configuration | CFU | - | - |
| MRMAC/DRMAC | CFU | APB | - |
| Interlaken | CFU | APB | - |
| SDFEC | - | AXI4-Lite | - |
| HDIO configuration | CFU | - | - |
| HDIO DPLLs | CFU | APB | - |
| Other DPLLs | NPI | - | - |
| NoC | NPI | - | NoC channel configuration |
| GTs | NPI | APB | - |
| DDRMC | NPI | - | DDR memory controller |
| HBM | NPI | - | - |
| XPipe, CPipe | NPI | - | - |
| XPIO, XPLL | NPI | - | - |
| XPHY | NPI | APB | - |
| MMCM, BUFG | NPI | APB | - |
| Miscellaneous clocks | NPI | - | BUFGS, PLL, PHY, GT, VNOC, CORE |
| DAC, ADC | NPI | APB | - |
| AI Engine configuration | NPI | - | - |
| AI Engine code, data | NoC | NoC | Memory-mapped |