The PMC and PS include several interfaces to and from the PL fabric. These PL interfaces are summarized here.
- PL to PS Interface Channels:
- PL_ACE_FPD provides AXI coherency extension (ACE) to FPD cache coherency interconnect (CCI)
- PL_ACP_FPD provides an accelerator coherency port (ACP) to the APU MPCore L2 cache snoop control unit
- PL_ACELITE_FPD provides an I/O cache coherent port to SMMU and CCI
- PL_AXI_FPD connects the PL fabric to the FPD main switch
- PL_AXI_LPD connects the PL fabric to the LPD main switch
- PS to PL Interface Channels:
The LPD and FPD each have an AXI interface channel to the PL. The data width on the PS side is always 128 bits. The PL interface data width can be configured as 32, 64, or 128 bits.
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PS-to-PL AXI Fabric Interfaces section
- FPD_AXI_PL: interface AXI port from FPD main switch to PL
- LPD OCM_SW_AXI_PL: interface AXI port from LPD OCM switch to PL