The cache coherent interfaces from the PL are listed in the following table.
| Interface Name | Cache Coherency | Description | Register Status and Control |
|---|---|---|---|
| PL_ACE_FPD | I/O coherent with APU L2 cache | PL to CCI caches with Snoop | |
| PL_ACELITE_FPD | Two-way coherent with APU L2 cache | PL to CCI caches | PL_ACELITE_FPD_CSR (e.g., RD_CTRL ) |