OSPI System-Level Registers - OSPI System-Level Registers

OSPI System-Level Registers - OSPI System-Level Registers - AM011

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID

AM011

Release Date

2026-03-06

Revision

1.9 English

The PMC_IOP_SLCR related registers are listed in the following table.

Table 1. OSPI-related Registers in the PMC_IOP_SLCR Register Set
Register Name	Description
OSPI_AXI_Sel	Select the AXI interface to OSPI: 0: OSPI DMA mode. AXI interface is driven by OSPI DMA 1: OSPI Linear mode. AXI interface is driven by the interconnect.
OSPI_Coherent	Define transaction coherency and bufferability policy
OSPI_Route	Route through FPD memory coherent interconnect for system cache coherency) or bypass it (non-coherent)
OSPI_QoS	QoS traffic type