OSPI Controller Registers

OSPI Controller Registers - AM011

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID

AM011

Release Date

2025-07-28

Revision

1.8 English

The following table lists the OSPI flash memory I/O controller registers.

Table 1. OSPI Flash Memory I/O Controller Register Overview
Register Name	Offset Address	Access Type	Description
Config	`0x0000`	RW	Controller configuration
Read_Instr_Config Write_Instr_Config	`0x0004` `0x0008`	RW	Device read and write instruction configurations
Device_Delay	`0x000C`	RW	I/O timing delay
Read_Data_Capture	`0x0010`	RW	Read data capture
Device_Size_Cfg	`0x0014`	RW	Device size configuration
SRAM_Partition_Config	`0x0018`	RW	SRAM partition configuration
AHB_Indirect_Addr	`0x001C`	RW	Indirect AHB address
DMA_Config	`0x0020`	RW	DMA peripheral configuration
Remap_Addr	`0x0024`	RW	Remap address
Mode_Bit_Config	`0x0028`	RW	Mode bit configuration
SRAM_Fill	`0x002C`	R	SRAM fill
Write_Completion_Ctrl	`0x0038`	RW	Write completion control
Poll_Expire	`0x003C`	RW	Polling expiration
IRQ_Status IRQ_Enable	`0x0040` `0x0044`	WTC RW	Interrupt status Interrupt enable
Tap_Granularity_Sel	`0x0048`	RW	Tap granularity select
WProt_Lower WProt_Upper	`0x0050` `0x0054`	RW	Write protection starting block: * Lower boundary * Upper boundary
WProt_Ctrl	`0x0058`	RW	Write protection control
Indirect_Read_Ctrl Indirect_Read_Watermark Indirect_Read_Start Indirect_Read_Num	`0x0060` `0x0064` `0x0068` `0x006C`	R, W, WTC RW RW RW	Indirect read transfer control Indirect read transfer watermark Indirect read transfer start address Indirect read transfer number (in bytes)
Indirect_Write_Ctrl Indirect_Write_Watermark Indirect_Write_Start_Addr Indirect_Write_Num Indirect_Trig_Addr	`0x0070` `0x0074` `0x0078` `0x007C` `0x0080`	R, W WTC RW RW RW	Indirect write transfer control Indirect write transfer watermark Indirect write transfer start address Indirect write transfer number bytes Indirect trigger address range
Flash_Cmd_Ctrl	`0x008C`	R, W, RW	Flash command control memory
Flash_Cmd_Ctrl	`0x0090`	R, W, RW	Flash command control
Flash_Cmd_Addr	`0x0094`	RW	Flash command address
Flash_Read_L Flash_Read_U	`0x00A0` `0x00A4`	R	Flash command read data, lower and upper
Flash_Write_L Flash_Write_U	`0x00A8` `0x00AC`	RW	Flash command write data, lower and upper
Poll_Status	`0x00B0`	R	Polling flash status
PHY_Config	`0x00B4`	W, RW	PHY configuration
PHY_Master_Ctrl	`0x00B8`	RW	PHY DLL master control
DLL_Observe_L DLL_Observe_U	`0x00BC` `0x00C0`	R	DLL observable, lower and upper
Opcode_Ext_L Opcode_Ext_U	`0x00E0` `0x00E4`	RW	Opcode extension, lower and upper
SAFETY_CHK	`0x1FF8`	RW	Safety check register