The MIO pins used for each boot interface are shown as shaded cells in the tables in the MIO-at-a-Glance Tables section.
Note: The PLM firmware can configure additional signals
to increase the functionality of a flash memory interface. This includes QSPI
loopback clock (LPBK) and the QSPI stacked architecture by programming the QSPI1
CS_b pin for additional flash memory.