The RPU includes local and system interrupt controllers.
Interrupt Types
The controller supports the following types of interrupts:
- Shared peripheral interrupts
- Shared peripheral interrupts (SPIs) are general-purpose interrupts generated by various sources in the system and managed by the GIC RPU interrupt controller. The SPI interrupts are listed in the System Interrupts chapter.
- Software generated interrupts
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- Software generated interrupts (SGIs) are inter-processor interrupts that are generated by writing to the software generated interrupt register (GICD_SGIR).
- There are 16 SGIs available for each processor, and they have no effect on the hardware.
General Interrupt Controller and Configurations
The general interrupt controller (GIC) is based on the Arm GIC-390 and it is configurable.
- Security state for an interrupt
- Priority level of an interrupt
- Enabling or disabling of an interrupt
- Processors that receive an interrupt
GIC Programming Interface
The GIC distributor receives interrupts and provides the highest priority interrupt to the CPU interface. An interrupt with a lower priority is forwarded when it becomes the highest priority pending interrupt.
The GIC CPU interface has a priority mask and only accepts a pending interrupt if it is:
- Higher priority than the programmed interrupt mask, and
- Higher priority than the interrupt the processor is currently servicing