Interface Routing Registers - AM011

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2025-03-11
Revision
1.7 English

The following table summarizes the system-level registers. These registers are used to route the two I/O signals to MIO device pins.

Table 1. I/O Interface Routing Registers
Controller Register Name Access Type Description
PMC_I2C MIO_PIN_0 + RW

52 registers:
PMC MIO pin 0 to
PMC MIO pin 51

LPD_I2Cx MIO_PIN_0 + RW

26 registers:
LPD MIO pin 0 to
LPD MIO pin 25