The XPPU has several features to protect access to register module programming interfaces and other memory segments.
- Access control for a specified set of address apertures on a per-SMID basis
- Access control granularity on a per-peripheral or a per-message buffer basis
- Up to 20 simultaneous sets of one or more SMID registers
- Several sets of programmable apertures, including:
- 256 x 64 KB for peripheral ports
- 16 x 1 MB for peripheral ports
- Single 512 MB for flash memory controller
- AXI transaction permission violation interrupt
- APB interface address decode error interrupt
The XPPU interfaces consist of the following:
- AXI interface programming port where SMID is carried on lower bits of AxUSER
- AXI interface control port
- APB programming interface (requires secure transactions to access)
- Level-sensitive, asynchronous system interrupt
Implementations
The implementations of the XPPU are listed in the Peripheral Protection Unit Implementations section.