The XPIO or X5IO banks are specifically designed to work with the integrated DDR memory controllers. Some banks can be connected as I/O to the PL, if not needed by the associated DDR memory controller.
See the Versal Architecture and Product Data Sheet: Overview (DS950) for devices, which contain XPIO or X5IO with integrated DDR memory controllers. For devices containing XPIO with integrated DDR memory controllers, see the Versal Adaptive SoC Programmable Network on Chip and Integrated Memory Controller LogiCORE IP Product Guide (PG313). For devices with X5IO with integrated DDR memory controllers, see the Integrated DDR5/LPDDR5/5X Memory Controller LogiCORE IP Product Guide (PG456).