Block Diagram - AM011

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2025-03-11
Revision
1.7 English

The I/O interface is routed to the PMC MIO bank. The I/O pins are listed in QSPI Flash Interface Signals. The PMC MIO bank is shown in the MIO-at-a-Glance Tables.

The high-level block diagram is shown in the following figure.

Figure 1. QSPI High-level Block Diagram