Accelerator RAM Implementation - Accelerator RAM Implementation - AM011

Versal Adaptive SoC Technical Reference Manual (AM011)
Document ID
AM011
Release Date
2026-03-06
Revision
1.9 English

The following table shows the device option accelerator RAM (XRAM) implementation.

Table 1. Accelerator RAM Implementation
Device Generation Accelerator RAM
UltraScale+ MPSoC Not available
Versal device Four MB memory device option
  • 1x LPD OCM port and up to 3x PL ports
  • Four way AXI crossbar switch
  • Four banks of memory, each with an XMPU